Santa Clara University

80_electrical_engineering

Advisory Board

The Advisory Board of the Electrical Engineering Department meets three times each year to provide input on academics, research, administration, outreach, advocacy, and development. The Board reviews the graduate and undergraduate curriculum and degree programs, program educational objectives, and program outcomes, and offers suggestions for change to keep them current. The Board evaluates the quality and scope of our research, its relationship to our programs, its relevancy and helps guide future directions. The Board recommends ways to build new relationships with industry and to strengthen those we have. The current Board Chair is Frank Barone. The biographies of its members are as follows:

Current Advisory Board Members

Barone, Frank Barone, Frank J. joined Lattice in June 1999 as a Corporate Vice President as a result of the Vantis acquisition. From September 1997 until he joined, Mr. Barone was Chief Operating Officer of Vantis Corporation, a spin-off from Advanced Micro Devices. Prior to Vantis, Mr. Barone spent 14 years at Advanced Micro Devices where he held various managerial positions. He also spent 12 years at National Semiconductor and four years at Motorola, Inc. Barone has a Bachelor's degree in Electrical Engineering and a Master's degree in Materials Science, both from Marquette University in Milwaukee, Wisconsin. Frank holds several patents in integrated circuit process technology and is a member of the Tau Beta Pi and Eta Kappa Nu engineering honor societies as well as the IEEE.
Brug, Jim Brug, Jim is the manager of the Imaging Materials Department at Hewlett-Packard Laboratories in Palo Alto, California. Jim joined HP Labs in 1984 after receiving his Ph.D in Applied Physics from Yale University. His research has covered a variety of topics in magnetics, thin film devices, MEMS and nanomaterials. Technologies that he has helped develop for HP include magneto-optic recording, magnetic disk drives, probe storage, MEMS micromovers, magnetic memory, biosensors, OLED displays and printed electronics. He spent a year with the National Institute of Standards and Technology working on the fundamentals of magnetics and he also led an ATP/NIST funded program on Ultra-High Density Recording Heads.
Chen, John Y.

Chen, John Y. has many years of experience in IC industry ranging from IDM to Foundry to Fabless companies. He started his career as a researcher in Hughes Research Laboratories, subsequently at Xerox Palo Alto Research Center (PARC). Most of his work involves CMOS technology. In 1992, He joined TSMC as the Senior Director responsible for Product Engineering and Backend Operations. He then became the first V.P. of R&D at TSMC, defining and driving technology roadmaps for the foundry industry. In 1997, he joined the start-up team as the V.P. of Operations for WaferTech, a JV then led by TSMC in Camas Washington. He built and ramped up the fab to 30,000 wafers a month. During his last year in WaferTech, he became the V.P. of Business Development. Since 2004, he has been the V.P. of Technology and Foundry Management at NVIDIA Corporation. He now also serves in few academic and industrial boards.

Dr. Chen has taught an earlier-bird course, “CMOS device physics and technology”, at the EE department of Santa Clara University three semesters. He was a visiting professor at Chiao-tung University in Hsin-chu, Taiwan teaching “Submircometer VLSI Technology”. He has given many lectures and invited speeches worldwide.

Dr. Chen, an IEEE Fellow, has authored 100 papers, mostly published by IEEE journals. His book on “CMOS Devices and Technology for VLSI“ was published by Prentice Hall in 1990. He was a Howard Hughes Doctor Fellow and received a Ph.D. in EE and an Executive Management degree, both from UCLA. He also holds a M.S. from University of Maine and a B.S. from National Taiwan University, both in E.E.

DeMarinis, David DeMarinis, David is the senior director and general manager of the SERDES Technology Group where he is responsible for developing high speed serial IO solutions for Xilinx FPGAs. He is also responsible for developing mixed-signal data acquisition solutions for Xilinx products. Previously, DeMarinis served as general manager of Xilinx Design Services and built a team to drive revenue and deliver customized solutions to Xilinx clients world wide.

Before joining Xilinx, DeMarinis served as director of strategic marketing and business development at ESS Technology – the market leader in PC Audio chips. He started his career at Texas Instruments as a mixed signal applications engineer and later as a technical sales representative calling on Apple Computer.

DeMarinis received his bachelor’s degree in electrical engineering from The Ohio State University.

douglass

Steve Douglass is Corporate Vice President of Customer Technology Deployment at Xilinx, where he is responsible for worldwide technical sales and support of their world leading programmable technologies and devices. Douglass has over 28 years of semiconductor industry experience that includes product planning and development, product marketing, P&L management, and leading international engineering teams.

Since joining Xilinx in 1998, Douglass has held a variety technical and business leadership positions including VP of Product Development and VP and GM of the Advance Products Division. He has been responsible for introducing many industry leading innovations including the integration of processors, transceivers and other system level technologies into FPGAs, driving their evolution from glue logic to system level devices.

Prior to joining Xilinx, Douglass worked at Cypress Semiconductor for 12 years in the Programmable Logic Division, holding various design and management positions. He was responsible for developing several programmable logic families and managing the CPLD Business Unit P&L. Prior to Cypress, Douglass held the position of Design Engineer for Intel Corp.

Douglass holds 23 U.S. patents for a variety of innovations, most of which are related to programmable hardware and systems. He has a bachelor's degree in electrical engineering from Santa Clara University and a master's degree in electrical engineering from Stanford University.

Hardman, Susan Hardman, Susan is senior vice president of the Analog and Mixed-Signal Products Group at Intersil Corporation, a leading global supplier of high-performance analog semiconductors for the automotive, consumer, computing, industrial and communications markets. Ms. Hardman has more than 25 years of experience in the semiconductor industry that includes international engineering management, P&L responsibility, strategic planning and implementation, mergers and acquisitions and investor relations.

Prior to her current role at Intersil, Ms. Hardman served as vice president and general manager of the company’s Automotive and Specialty Products Group, and as vice president of Corporate Marketing.

She joined Intersil from Exar Corporation, where she was vice president and general manager of the Interface Products Division. Prior to that, she served as vice president of Corporate Marketing and director of Product Marketing.

Before Exar, Ms. Hardman worked for VLSI Technology in a variety of engineering and management positions, most recently as director of product marketing for the Networking Products Group. Ms. Hardman began her career with Motorola, where she worked for six years in a variety of engineering roles.

Ms. Hardman holds a BS degree in Chemical Engineering from Purdue University and an MBA degree from the University of Phoenix. She was also named an Outstanding Chemical Engineer by Purdue University in 2004.

  Hoke, Chad is a Director of New Business Creation in Agilent Technologies corporate incubator which is chartered with identifying and launching new businesses. He joined Agilent in 1999 after completing a Ph.D. in Optoelectronics from the Liquid Crystal Institute at Kent State University. Over the past decade Chad has held a variety of role ranging from managing and incubating new technologies in the central research labs to leading product development efforts in Agilent's business units. Chad is the recipient of a fellowship from the National Science Foundation and the author of more than 30 patents. He has also received an MBA from the Leavy School of Business at Santa Clara University.
Jew, Ron

Ron Jew is Sr. Director and General Manager of the Wireless Infrastructure Product Group at Integrated Device Technology Inc. (IDTI), the semiconductor market leader in timing, serial switching and interfaces, providing application-optimized, mixed-signal solutions for the communications, computing and consumer segments.

Ron has more than 20 years of experience in the semiconductor industry that includes, strategic product planning and development, product marketing, P&L management, merger and acquisition, and engineering management.

As General Manager of the Wireless Infrastructure Product Group, Ron is responsible for P&L, marketing, applications, product and test, and product development groups focused on solutions utilizing Serial RapidIO interfaces, the dominant protocol in wireless base station architectures.

Previously, as Strategic Marketing Director of the IDT S-RIO business unit, Ron led an acquisition team to integrate a competing company into the IDT business unit, and gained responsibility for the combined, international group.

Ron formerly served in various management and engineering roles for the multiport memory product group at IDT. Responsibilities included driving the strategy, direction and execution of multi-port static RAM memory devices, and leading product development and engineering, production control, marketing and applications engineering teams.

Ron is a graduate of Santa Clara University, earning a Bachelor of Science and Masters of Science in Electrical Engineering.

Maloney, Mark

Maloney, Mark is currently the Bay Area's Team Lead for Engineering Support at Rohde & Schwarz, Inc.. Mr. Maloney has 20 years of experience in a variety of engineering positions. Prior to his current role at Rohde & Schwarz, he worked as an analog circuit designer for Avago Technologies and Agilent Technologies. He also worked as a mixed-signal IC designer for Agilent Technolgies and as a digital ASIC designer for Hewlett-Packard, working on several award-winnning LaserJet printer projects. Other roles have included, project lead and customer liaison.

Mr. Maloney holds a BS is Electrical Engineer from Santa Clara University, class of '93, and a Masters Degree in Electrical Engineer from Stanford University. He is an IEEE Senior Member and holds a patent in the area of testability.

Melrose, Caryn Melrose, Caryn is currently a Senior Firmware Development Manager at Hitachi Global Storage. Ms. Melrose has more than 25 years of experience spanning the storage, semiconductor, and consumer electronics industries. Prior to her current role at Hitachi Global Storage she held various management positions including Director of Engineering at Neomagic Corporation and Director of Engineering at National Semiconductor Corporation. She has also held engineering management positions with SUN Microelectronics and LSI Logic. She began her career with IBM Corporation in Boca Raton, Florida, and held a variety of engineering positions at IBM that that spanned storage, ASIC design, ASIC design methodology, technical education grants, project management, and customer support roles.

Ms. Melrose holds a BS degree in Electrical Engineering from the University of Florida, and a Masters Degree in Electrical Engineering from Rice University.

Meyyappan, Meyya

Meyyappan, Meyya is Chief Scientist for Exploration Technology at NASA Ames Research Center in Moffett Field, CA. Until June 2006, he served as the Director of the Center for Nanotechnology. He is a founding member of the Interagency Working Group on Nanotechnology (IWGN) established by the Office of Science and Technology Policy (OSTP). The IWGN is responsible for putting together the National Nanotechnology Initiative

Dr. Meyyappan has authored or co-authored over 250 articles in peer- reviewed journals and made over 200 Invited/Keynote/Plenary Talks in nanotechnology subjects across the world. His research interests include carbon nanotubes, graphene, and various inorganic nanowires, their growth and characterization, and application development in chemical and biosensors, instrumentation, electronics and optoelectronics.

Dr. Meyyappan is a Fellow of the Institute of Electrical and Electronics Engineers (IEEE), Electrochemical Society (ECS), American Vacuum Society (AVS), Materials Research Society (MRS), Institute of Physics (IOP), American Institute of Chemical Engineers (AIChE) and the California Council of Science and Technology. In addition, he is a member of the American Society of Mechanical Engineers (ASME). He is currently the IEEE Nanotechnology Council (NTC) Distinguished Lecturer on Nanotechnology, IEEE Electron DevicesSociety (EDS) Distinguished Lecturer, and was ASME's Distinguished Lecturer on Nanotechnology (2004-2006). He served as the President of the IEEE's Nanotechnology Council in 2006-2007. He currently serves as the Vice President of IEEE-EDS for Educational Activities.

For his contributions and leadership in nanotechnology, he has received numerous awards including: a Presidential Meritorious Award; NASA's Outstanding Leadership Medal; Arthur Flemming Award given by the Arthur Flemming Foundation and the George Washington University; IEEE Judith Resnick Award; IEEE-USA Harry Diamond Award; AIChE Nanoscale Science and Engineering Forum Award; Distinguished Engineering Achievement Award by the Engineers' Council; Pioneer Award in Nanotechnology by the IEEE-NTC. For his sustained contributions to nanotechnology, he was inducted into the Silicon Valley Engineering Council Hall of Fame in February 2009. For his educational contributions, he has received: Outstanding Recognition Award from the NASA Office of Education; the Engineer of the Year Award(2004) by the San Francisco Section of the American Institute of Aeronautics and Astronautics (AIAA); IEEE-EDS Education Award; IEEE-EAB (Educational Activities Board) Meritorious Achievement Award in Continuing Education.

Wooley, Bruce

Bruce A. Wooley is the Robert L. and Audrey S. Hancock Professor of Engineering, Emeritus, in the Department of Electrical Engineering at Stanford University. He received a Ph.D. degree in Electrical Engineering from the University of California, Berkeley in 1970, and from 1970 to 1984 he was a member of the research staff at Bell Laboratories in Holmdel, NJ. He joined the faculty at Stanford in 1984. At Stanford he has served as the Chair of the Department of Electrical Engineering, the Senior Associate Dean of Engineering and the Director of the Integrated Circuits Laboratory. His research is in the field of integrated circuit design, where his interests include low-power mixedsignal circuit design, oversampling analog-to-digital and digital-to-analog conversion, circuit design techniques for video and image data acquisition, high-speed embedded memory, high-performance packaging and testing, and circuits for wireless and wireline communications. He has published more than 160 technical articles.

Prof. Wooley is a Life Fellow of the IEEE and a past President of the IEEE SolidState Circuits Society. He has served as the Editor of the IEEE Journal of Solid-State Circuits and as the Chairman of both the International Solid-State Circuits Conference (ISSCC) and the Symposium on VLSI Circuits. Among the awards he has received are the University Medal from the University of California, Berkeley, the IEEE Journal of Solid-State Circuits Best Paper Award, recognition for his Outstanding Contributions to the Technical Papers of the International Solid-State Circuits Conference on the occasion of the conference’s fiftieth anniversary, the IEEE Third Millennium Medal, the Outstanding Alumnus Award from the EECS Department at the University of California, Berkeley, the SIA University Research Award, and the IEEE Solid-State Circuits Technical Field Award.

Past Advisory Board Members

Fontana, Robert E. Jr. received his B.S., M.S., and Ph.D. degrees in Electrical Engineering from the Massachusetts Institute of Technology in 1969, 1971, and 1975, respectively. He has worked to develop and improve thin-film process technologies for manufacturing magnetic device structures for the past 28 years. Dr. Fontana is a Member of the National Academy of Engineering (2002) and a Fellow of the Institute of Electrical and Electronic Engineers (1996). In 2000 Dr. Fontana received the IEEE Cledo Brunetti Technical Field Award for excellence in the art of electronic miniaturization for contributions to the manufacture of thin film magnetic recording heads. Dr. Fontana was President of the IEEE Magnetics Society for 2001-2002. He holds 49 patents on magnetic thin-film structures and has authored 33 technical papers on magnetic storage device structures. From 1975 to 1981, Dr. Fontana worked at Texas Instruments, where he was responsible for new product and process development for 92 Kbit, 256 Kbit, and 1 Mbit magnetic bubble devices. From 1981 to 2002, Dr. Fontana worked at IBM, in both the Research Division and the Storage Products Division, which recently became part of Hitachi Global Storage Technologies, where he was instrumental in making the innovative thin-film magnetic recording heads that have enabled the industry's huge 3,000-fold increases in data storage density. Dr. Fontana's present focus is on the processing and fabrication issues for future advanced magnetic sensors.

Jamali, Hamadi is currently engaged in creating a vision for the first Toyota Information Technology Research Center in North America. Before that, he helped Roger Melen and Harry Garland, two PC pioneers, form the first Japanese Research Center in North America for Canon where he led the research group for over 8 years. Hamadi has 3 US patents in networking, document processing, and pattern recognition to his credit as well a number of publications. Hamadi holds a Ph.D. in E.E. from Santa Clara University, an M.S.E.E. from the Naval Postgraduate School in Monterey, and an Ingenieur d'Etat from l'Ecole Royal Navale. Hamadi is a member of IEEE, an active balloting member of the IEEE 802 standards body, and a past board member of NHF.

Morehouse, Charles C. graduated from the University of California at Berkeley in 1970 with a Ph.D. in Elementary Particle Physics. He worked first at the Deutsches Elektronen Synchrotron in Hamburg, Germany and then at the Stanford Linear Accelerator Center in Stanford, California on elementary particle physics experiments for a total of six years. He spent three years at Varian Associates in Palo Alto, California working on whole body computer assisted tomography scanners. He joined Hewlett-Packard in 1979 to work on magnetic thin film recording disks. He moved on to work in machine vision, artificial intelligence (during an appointment at Hewlett Packard Laboratories in Bristol, England) and returned to the storage field in 1991. Since 1999 he has been the Director of the Information Access Lab, managing research in advanced storage materials and systems. Dr. Morehouse is also currently the chairman of the Industrial Advisory Panel of the Materials Department of Oxford University.

Nishi, Yoshio, Director, Stanford Nanofabrication Facility, received BS in material science and Ph.D. in electronics engineering from Waseda University and the University of Tokyo, respectively. He joined Toshiba R&D, Japan, in the areas of research for semiconductor device physics and interfaces mostly in silicon, resulting in discovery of ESR PB Center at SiO2-Si interface, the first 256bitMNOS non-volatile RAM, SOS 16bit micro-processor and the world 1st 1Mb CMOS DRAM. He joined Hewlett-Packard (1986) as the Director of Silicon Process Lab, followed by establishing ULSI Research Lab as the Founding Director. He joined Texas Instruments, Inc. (1995) as Senior VP and Director of Research and Development for semiconductor group, where he implemented new R&D model for silicon technology development by establishing Kilby Center. Since May 2002, he became a faculty member of Stanford University. Published more than120 papers including conference proceedings, and co-authored 7 books. Hold more than 70 patents in US and Japan. He has served SRC and International Sematech as Board member, on the NNI Panel, and on the MARCO Governing Council. Dr. Nishi was elected Fellow of IEEE in 1987, and he is a recipient of the 1995 IEEE Jack Morton Award, and the 2002 Robert Noyce Medal.

Smith, Linda C. received her M.S.E.E. degree from Santa Clara University in 1984. She graduated from the University of California, Santa Cruz with a B.S. degree in Physics in June, 1979. She has more than 20 years experience in the semiconductor industry, primarily working in device electrical characterization and SPICE modeling of semiconductor devices, including CMOS, BiCMOS and Bipolar technologies. She is currently Director of SPICE modeling at National Semiconductor, reporting to the Vice President of Advanced Process Technology Development. In this capacity, she is responsible for managing 14 engineers. In addition, she interfaces with circuit designers, CAD groups, and process development groups both within the company and in the customer/vendor community at large.

Taubman, Chuck retired from Hewlett-Packard/Agilent in 1999 after 33 years of service as an R∓D Engineer and Functional Manager of Personnel, Quality, and Manufacturing. His degrees are from Stanford (BSEE), MIT (MSEE), and Santa Clara (MBA). He has a long association with Santa Clara University and has recruited here for HP for 25 years. He does extensive volunteer work in the community for his faith group.

Weng, David was most recently an Engineering Director in Internet Technologies Division of Cisco Systems Inc. He has 20 years of industry engineering experience in computer and networking area. David joined Cisco in 1992, where he established Software Engineering Solutions and Automated Network Testing Infrastructure for Cisco from scratch. His team is responsible for developing integrated test technologies to provide end-to-end automated test solutions for Data, Voice, and Video networks. David manages several R&D groups in San Jose, CA, Research Triangle Park, NC, India, and Taiwan. His team has partnered with National Chiao-Tung University and III in Taiwan to develop Internet Technologies since March 2000. David Weng graduated from Fu-Jen Catholic University in Taiwan in 1979. He earned his M.S. Computer Science Engineering degree from San Jose State University in 1983. Prior to joining Cisco, David worked for Hewlett-Packard for 7 years. He managed a development group at HP, Information Networks Division. David also worked at Sun Micro Systems and Software Publishing Corporation as senior engineering managers. He is a member of FAPA 100, and serves as the Vice President of Taiwanese Industrial Technology Association Silicon Valley Chapter.

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