Santa Clara University


Advisory Board

The Advisory Board of the Electrical Engineering Department meets three times each year to provide input on academics, research, administration, outreach, advocacy, and development. The Board reviews the graduate and undergraduate curriculum and degree programs, program educational objectives, and program outcomes, and offers suggestions for change to keep them current. The Board evaluates the quality and scope of our research, its relationship to our programs, its relevancy and helps guide future directions. The Board recommends ways to build new relationships with industry and to strengthen those we have. The current Board Chair is Bruce Wooley. The biographies of its members are as follows:

Current Advisory Board Members

Barone, Frank  Frank J. Barone joined Lattice in June 1999 as a Corporate Vice President as a result of the Vantis acquisition. From September 1997 until he joined, Mr. Barone was Chief Operating Officer of Vantis Corporation, a spin-off from Advanced Micro Devices. Prior to Vantis, Mr. Barone spent 14 years at Advanced Micro Devices where he held various managerial positions. He also spent 12 years at National Semiconductor and four years at Motorola, Inc. Barone has a Bachelor's degree in Electrical Engineering and a Master's degree in Materials Science, both from Marquette University in Milwaukee, Wisconsin. Frank holds several patents in integrated circuit process technology and is a member of the Tau Beta Pi and Eta Kappa Nu engineering honor societies as well as the IEEE.
don_chan_14 Don Chan is the Vice President of the Corporate Applications Engineering (CAE) organization in the Design Business Group at Synopsys.He currently manages a global organization responsible for working with R&D and Marketing in product definition, development, and support of Digital Implementation products.The CAE organization also provides design and methodology support to the field organization and semiconductor design teams globally.Don has a successful track record in rolling out and deploying products and building strong relationship with customers.He has more than 28 years of experience in IC design and Electronic Design Automation (EDA).

Prior to joining Synopsys, Don worked at Fujitsu Microelectronics and Spectrum Software.Don also spent two academic years as a part-time lecturer teaching undergraduate courses in analog and digital integrated circuits.Don holds a MS degree in Electrical Engineering from Santa Clara University and a BS degree in Engineering from San Francisco State University.

Chen, John Y.

John Y. Chen has many years of experience in IC industry ranging from IDM to Foundry to Fabless companies. He started his career as a researcher in Hughes Research Laboratories, subsequently at Xerox Palo Alto Research Center (PARC). Most of his work involves CMOS technology. In 1992, He joined TSMC as the Senior Director responsible for Product Engineering and Backend Operations. He then became the first V.P. of R&D at TSMC, defining and driving technology roadmaps for the foundry industry. In 1997, he joined the start-up team as the V.P. of Operations for WaferTech, a JV then led by TSMC in Camas Washington. He built and ramped up the fab to 30,000 wafers a month. During his last year in WaferTech, he became the V.P. of Business Development. Since 2004, he has been the V.P. of Technology and Foundry Management at NVIDIA Corporation. He now also serves in few academic and industrial boards.

Dr. Chen has taught an earlier-bird course, “CMOS device physics and technology”, at the EE department of Santa Clara University three semesters. He was a visiting professor at Chiao-tung University in Hsin-chu, Taiwan teaching “Submircometer VLSI Technology”. He has given many lectures and invited speeches worldwide.

Dr. Chen, an IEEE Fellow, has authored 100 papers, mostly published by IEEE journals. His book on “CMOS Devices and Technology for VLSI“ was published by Prentice Hall in 1990. He was a Howard Hughes Doctor Fellow and received a Ph.D. in EE and an Executive Management degree, both from UCLA. He also holds a M.S. from University of Maine and a B.S. from National Taiwan University, both in E.E.

DeMarinis, David David DeMarinis is the senior director and general manager of the SERDES Technology Group where he is responsible for developing high speed serial IO solutions for Xilinx FPGAs. He is also responsible for developing mixed-signal data acquisition solutions for Xilinx products. Previously, DeMarinis served as general manager of Xilinx Design Services and built a team to drive revenue and deliver customized solutions to Xilinx clients world wide.

Before joining Xilinx, DeMarinis served as director of strategic marketing and business development at ESS Technology – the market leader in PC Audio chips. He started his career at Texas Instruments as a mixed signal applications engineer and later as a technical sales representative calling on Apple Computer.

DeMarinis received his bachelor’s degree in electrical engineering from The Ohio State University.


Steve Douglass is Corporate Vice President of Customer Technology Deployment at Xilinx, where he is responsible for worldwide technical sales and support of their world leading programmable technologies and devices. Douglass has over 28 years of semiconductor industry experience that includes product planning and development, product marketing, P&L management, and leading international engineering teams.

Since joining Xilinx in 1998, Douglass has held a variety technical and business leadership positions including VP of Product Development and VP and GM of the Advance Products Division. He has been responsible for introducing many industry leading innovations including the integration of processors, transceivers and other system level technologies into FPGAs, driving their evolution from glue logic to system level devices.

Prior to joining Xilinx, Douglass worked at Cypress Semiconductor for 12 years in the Programmable Logic Division, holding various design and management positions. He was responsible for developing several programmable logic families and managing the CPLD Business Unit P&L. Prior to Cypress, Douglass held the position of Design Engineer for Intel Corp.

Douglass holds 23 U.S. patents for a variety of innovations, most of which are related to programmable hardware and systems. He has a bachelor's degree in electrical engineering from Santa Clara University and a master's degree in electrical engineering from Stanford University.

Hardman, Susan Susan Hardman is senior vice president of the Analog and Mixed-Signal Products Group at Intersil Corporation, a leading global supplier of high-performance analog semiconductors for the automotive, consumer, computing, industrial and communications markets. Ms. Hardman has more than 25 years of experience in the semiconductor industry that includes international engineering management, P&L responsibility, strategic planning and implementation, mergers and acquisitions and investor relations.

Prior to her current role at Intersil, Ms. Hardman served as vice president and general manager of the company’s Automotive and Specialty Products Group, and as vice president of Corporate Marketing.

She joined Intersil from Exar Corporation, where she was vice president and general manager of the Interface Products Division. Prior to that, she served as vice president of Corporate Marketing and director of Product Marketing.

Before Exar, Ms. Hardman worked for VLSI Technology in a variety of engineering and management positions, most recently as director of product marketing for the Networking Products Group. Ms. Hardman began her career with Motorola, where she worked for six years in a variety of engineering roles.

Ms. Hardman holds a BS degree in Chemical Engineering from Purdue University and an MBA degree from the University of Phoenix. She was also named an Outstanding Chemical Engineer by Purdue University in 2004.

Jew, Ron

Ron Jew is Sr. Director and General Manager of the Wireless Infrastructure Product Group at Integrated Device Technology Inc. (IDTI), the semiconductor market leader in timing, serial switching and interfaces, providing application-optimized, mixed-signal solutions for the communications, computing and consumer segments.

Ron has more than 20 years of experience in the semiconductor industry that includes, strategic product planning and development, product marketing, P&L management, merger and acquisition, and engineering management.

As General Manager of the Wireless Infrastructure Product Group, Ron is responsible for P&L, marketing, applications, product and test, and product development groups focused on solutions utilizing Serial RapidIO interfaces, the dominant protocol in wireless base station architectures.

Previously, as Strategic Marketing Director of the IDT S-RIO business unit, Ron led an acquisition team to integrate a competing company into the IDT business unit, and gained responsibility for the combined, international group.

Ron formerly served in various management and engineering roles for the multiport memory product group at IDT. Responsibilities included driving the strategy, direction and execution of multi-port static RAM memory devices, and leading product development and engineering, production control, marketing and applications engineering teams.

Ron is a graduate of Santa Clara University, earning a Bachelor of Science and Masters of Science in Electrical Engineering.

Hagop_Kozanian Hagop Kozanian  serves as Vice President and General Manager for Texas Instruments Worldwide Analog Marketing and has led the centralized marketing functions since March 2012. Through systems marketing and applications, power design services, pricing and analytics - his teams make it easier for TI's extensive sales and applications force to support the company's broad customer base.

Previously, Hagop led teams in the TI Sales organization to support a broad range of customers and geographies. In his most recent Sales leadership role, he managed the South area sales and field applications team, which supports a diverse group of customers in the Southern part of the U.S. His career history also includes serving as regional sales manager in the San Francisco Bay Area.

Hagop is an alumni of the class of 2004 and holds a Bachelor of Science degree in electrical engineering from Santa Clara University.

Maloney, Mark

Mark Maloney is currently the Bay Area's Team Lead for Engineering Support at Rohde & Schwarz, Inc.. Mr. Maloney has 20 years of experience in a variety of engineering positions. Prior to his current role at Rohde & Schwarz, he worked as an analog circuit designer for Avago Technologies and Agilent Technologies. He also worked as a mixed-signal IC designer for Agilent Technolgies and as a digital ASIC designer for Hewlett-Packard, working on several award-winnning LaserJet printer projects. Other roles have included, project lead and customer liaison.

Mr. Maloney holds a BS is Electrical Engineer from Santa Clara University, class of '93, and a Masters Degree in Electrical Engineer from Stanford University. He is an IEEE Senior Member and holds a patent in the area of testability.

Melrose, Caryn Caryn Melrose is currently a Senior Firmware Development Manager at Hitachi Global Storage. Ms. Melrose has more than 25 years of experience spanning the storage, semiconductor, and consumer electronics industries. Prior to her current role at Hitachi Global Storage she held various management positions including Director of Engineering at Neomagic Corporation and Director of Engineering at National Semiconductor Corporation. She has also held engineering management positions with SUN Microelectronics and LSI Logic. She began her career with IBM Corporation in Boca Raton, Florida, and held a variety of engineering positions at IBM that that spanned storage, ASIC design, ASIC design methodology, technical education grants, project management, and customer support roles.

Ms. Melrose holds a BS degree in Electrical Engineering from the University of Florida, and a Masters Degree in Electrical Engineering from Rice University.

Wooley, Bruce

Bruce A. Wooley is the Robert L. and Audrey S. Hancock Professor of Engineering, Emeritus, in the Department of Electrical Engineering at Stanford University. He received a Ph.D. degree in Electrical Engineering from the University of California, Berkeley in 1970, and from 1970 to 1984 he was a member of the research staff at Bell Laboratories in Holmdel, NJ. He joined the faculty at Stanford in 1984. At Stanford he has served as the Chair of the Department of Electrical Engineering, the Senior Associate Dean of Engineering and the Director of the Integrated Circuits Laboratory. His research is in the field of integrated circuit design, where his interests include low-power mixedsignal circuit design, oversampling analog-to-digital and digital-to-analog conversion, circuit design techniques for video and image data acquisition, high-speed embedded memory, high-performance packaging and testing, and circuits for wireless and wireline communications. He has published more than 160 technical articles.

Prof. Wooley is a Life Fellow of the IEEE and a past President of the IEEE SolidState Circuits Society. He has served as the Editor of the IEEE Journal of Solid-State Circuits and as the Chairman of both the International Solid-State Circuits Conference (ISSCC) and the Symposium on VLSI Circuits. Among the awards he has received are the University Medal from the University of California, Berkeley, the IEEE Journal of Solid-State Circuits Best Paper Award, recognition for his Outstanding Contributions to the Technical Papers of the International Solid-State Circuits Conference on the occasion of the conference’s fiftieth anniversary, the IEEE Third Millennium Medal, the Outstanding Alumnus Award from the EECS Department at the University of California, Berkeley, the SIA University Research Award, and the IEEE Solid-State Circuits Technical Field Award.

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